This invention relates to an expandable modular control system with reduced memory requirements employing a universal microprocessor module comprising a microprocessor device and having novel program interrupt means.
Reference may be made to the following U.S. Pat. Nos. 3,364,395; 3,716,843; 3,447,037; 3,105,869; 3,406,368; 3,560,799; and 3,576,515.
Prior to the introduction of "CPU-on-a-chip" LSI/MOS microprocessor devices employing primarily software (programming) rather than hardware (wired logic circuitry) in their data processing operation, electronic data processing (EDP) systems were, for the most part, specialized pieces of equipment utilizing hardware. Such systems were not therefore readily adaptable to a variety of different control system applications.
With the introduction of microprocessor devices, however, a new generation of versatile electronic data processing (EDP) systems which can be adapted to a wide variety of control system applications through substitution of new control programs has been developed. Although the resulting flexibility afforded the control system enables it to meet the requirements of a wide range of different control system applications, its use is limited somewhat by its memory capacity and the input/output devices with which it can interface, characteristics which for the most part are determined at manufacture. Thus, a particular microprocessor control system may have more than the optimum memory capacity for one application but too little for another. Similarly, the system may have the capability of interfacing with a particular type of input/output device required in one application, but which is an unneeded luxury in a different application. As a result, system design has heretofore been largely determined by a tradeoff between the desired versatility and the extra cost resulting from the additional memory and input/output capabilities required.
While the flexibility of many prior art control systems utilizing conventional CPU devices can be enhanced considerably by providing for the interruption of the control program to excute sub-routines as required, certain ones of the several microprocessor devices commercially available today are not able to restore the status of the carry (C), sign (S), zero (Z) and parity (P) flag bits after being interrupted. If the program is interrupted and the flag bit status is lost as a result thereof before a point is reached in the control program where the loss is immaterial, subsequent processing by the microprocessor will result in erroneous output data. Although subsequent generations of microprocessor devices have included means for restoring or otherwise retaining this information, the added cost of such devices is prohibitive for many simpler applications.